1. Field
This disclosure relates generally to semiconductor structures, and more specifically, to semiconductor devices that monitor forward and reverse back bias voltages for adjusting threshold voltage of transistors.
2. Related Art
Integrated circuits are comprised of semiconductor devices such as complementary metal oxide semiconductor field effect transistors (CMOSFETs) formed on a substrate with either a positively charged or negatively charged doped body or well region. MOSFETs also include a source terminal and a drain terminal that are connected to highly doped regions separated by the well region. The source and drain regions can be either p or n type, but they are both the same type, and of opposite type to the doping of the well region. If the MOSFET is an n-channel or n-type FET, then the source and drain are ‘n+’ regions and the well region is a ‘p’ region. If the MOSFET is a p-channel or p-type FET, then the source and drain are ‘p+’ regions and the well region is an ‘n’ region.
For n-type devices, sufficient voltage applied at a gate between the source and drain regions increases the current flow in a channel between the source and the drain regions. For gate voltages below a threshold value, the channel is lightly populated, and only a very small subthreshold leakage current flows between the source and the drain. As the voltage increases to a threshold level, current flow increases from the drain to the source region. P-type devices work in a manner opposite to n-type devices. A negative gate-source voltage creates a p-channel at the surface of the n-well region, analogous to the n-channel case, but with opposite polarities of charges and voltages. When a voltage less negative than the threshold value (a negative voltage for p-channel) is applied between gate and source, the channel disappears and only a very small subthreshold current can flow between the source and the drain.
In order to adjust threshold voltage required to operate MOSFETs, a bias voltage can be applied to the well regions, causing the well region to act as a second gate. The well region can be referred to as the “back gate” and bias voltage applied to the back gate can be referred to as “back bias” voltage. The back bias voltage can increase or decrease the threshold voltage. For an n-type device, a forward (positive comparing to its source voltage) back bias voltage applied to the p-well lowers the threshold voltage while a reverse (negative comparing to its source voltage) back bias voltage raises the threshold voltage. For a p-type device, a forward (negative comparing to its source voltage) back bias voltage applied to the n-well lowers the threshold voltage while a reverse (positive comparing to its source voltage) back bias voltage increases the threshold voltage.